A typical envisaged application is that of analog-digital converters with high resolution, typically converters of 12 or 14 bits the structure of which is highly parallel in order to make it possible to perform a very rapid conversion. The converters of the flash type, for example, have a highly parallel structure in the sense that very many individual voltage comparators simultaneously carry out a comparison operation between an input voltage and various reference voltages. These comparators can each use one or more current sources and all the current sources must be perfectly identical with one another otherwise the result of the conversion is skewed. In an example of a converter with 14-bit resolution, there may be more than three hundred juxtaposed current sources which must all deliver strictly identical currents. To generate these currents, each source comprises, for example, a transistor which receives two reference potentials; one of the potentials is a bias potential of the base, the other is a power supply potential (for example a ground potential) to which the emitter or the source of the transistor is connected, directly or via an emitter or source resistance. In order for all the currents generated by these sources to be strictly identical, all the transistors and their resistances must be identical and they must also all receive the same bias potential and the same power supply potential.
In these structures with a large number of identical elementary circuits that must all receive in parallel one and the same potential, whether it be a high power supply potential or a low power supply potential, or a reference potential, or a potential to be measured, a difficulty is encountered which is associated with the fact that the voltage-supply conductors do not have an infinite conductivity but a conductivity that is limited by technological factors; the identical elementary circuits each consume a current which flows in this voltage-supply conductor; a voltage drop occurs in this conductor in proportion to the current consumed by the elementary circuits so that the elementary circuits receive different voltages depending on whether they are placed closer to or further from an upstream end of the conductor. “Large number” means a number at least equal to twenty and preferably at least fifty. The identical voltages are reference voltages which may, optionally but not necessarily, be voltages for powering the integrated circuit.
The voltage drop phenomenon is explained in FIG. 1 in the exemplary case of N elementary circuits CE1, CE2, . . . CEj, . . . CEN connected between a bias conductor CA conveying a reference potential Vref and a ground conductor CB conveying a power supply potential V0 equal to 0 (ground potential). It is supposed that the elementary circuits each consume a current ia originating from the bias conductor and that they each return a current ib to the ground conductor. In the example of an elementary circuit that is a current source formed by a bipolar transistor, the current ia is the current consumed by the base of the transistor, and the current ib is the emitter current. The collector is used, for example, to draw a current ic=ia+ib from a differential pair (not shown) used in a voltage or current comparator associated with each elementary circuit. It is assumed that the ground conductor and the power supply conductor both have a specific non-zero resistivity, such that the resistance of the conductor between two adjacent elementary circuits CEj and CEj+1, of rank j and j+1, spaced at a pitch d has a value Ra for the first conductor CA and a value Rb for the second conductor CB.
For the conductor CA transporting the potential Vref, it is also considered, in order to simplify the calculations, that there is a resistance Ra between the circuit which generates the voltage Vref and the first elementary circuit CE1. For the ground conductor CB, it is considered also that there is a resistance Rb between the true ground GND and the first elementary circuit CE1.
In this situation, it is easy to show that the last section of resistance RA of the conductor CA produces a voltage drop Ra.ia, that the penultimate produces a voltage drop 2.Ra.ia, etc. It can therefore be shown by the calculation that the power supply voltage that is really applied to the head of the elementary circuit CEj of rank j is not Vref but V′ref(j)=Vref−Ra.ia.j.(2N+1−j)/2, N being the total number of circuits.
Similarly, there is a voltage drop in the conductor CB, so that the foot of the elementary circuit CEj of rank j is not connected to the zero potential of the ground but rather to a potential Rb.ib.j.(2N+1−j)/2.
The potential difference V′ref(j)−V′0(j) then applied between the head and the foot of an elementary circuit of rank j is thereforeV′ref(j)−V′0(j)=Vref−(Ra.ia+Rb.ib).j.(2N+1−j)/2.
The difference relative to Vref increases as N increases and this difference reaches N.(N+1).(Ra.ia+Rb.in)/2 for the elementary circuit of rank j. If N is more than 100, it is seen that the error on the potential difference applied to the circuit of rank N is 10 000 times the voltage drop in an elementary section traveled by an elementary current, of the conductors CA and CB. If N is equal to 300, it is almost 100 000 times this drop. Even if the elementary voltage drop is very low, the error becomes considerable when N reaches one or several hundreds.
To make the applied potential difference as close as possible to Vref, the conventional solution is therefore to reduce as much as possible the value of the resistances Ra and Rb. Use is made of conductors CA and CB made of highly conductive material (aluminum or copper preferably) that are sufficiently thick (but with the constraints of the technology used), and sufficiently wide (but with all the more space requirement).
FIG. 2 shows a realistic physical layout of such an integrated circuit; the reference potential Vref is produced by a voltage-generation circuit CT which forms part of the integrated circuit and which is placed at the end of the succession of elementary circuits. The power supply potential V0 is that of the ground and can be supplied by an external power supply land PLT of the integrated circuit.
It would also be possible to supply each individual voltage to the elementary circuits from a central conductor which spreads out in successive branches organized so that the path from the reference potential (Vref or V0) has the same resistance to each of the circuits. But the space requirement that would result from such a tree structure is very large if there are several hundreds of circuits to be powered.